LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 146

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

5-30
FF4
SPL1
R
LDSC
SDP1
SCSI Operating Registers
FIFO Flags bit 4
This is the most significant bit in the SCSI FIFO Flags
field, with the rest of the bits in
(SSTAT1). For a complete description of this field, see the
definition for
Latched SCSI parity for SD[15:8]
This active high bit reflects the SCSI odd parity signal
corresponding to the data latched into the most
significant byte in the
register.
Reserved
Last Disconnect
This bit is used in conjunction with the Connected (CON)
bit in
detect the case in which a target device disconnects, and
then some SCSI device selects or reselects the
LSI53C875. If the Connected bit is asserted and the
LDSC bit is asserted, a disconnect is indicated. This bit
is set when the Connected bit in
(SCNTL1)
instruction is executed while the Connected bit in
Control One (SCNTL1)
SCSI SDP1 Signal
This bit represents the active high current state of the
SCSI SDP1 parity signal. It is unlatched and may change
as it is read.
SCSI Control One
is off. This bit is cleared when a Block Move
SCSI Status One
SCSI Input Data Latch (SIDL)
is on.
(SCNTL1). It allows the user to
(SSTAT1), bits [7:4].
SCSI Status One
SCSI Control One
SCSI
4
3
2
1
0