LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 207

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

SCSIP[2:0]
TC[23:0]
Block Move Instructions
5. If the SCSI phase bits do not match the value stored
6. During a Message-Out phase, after the LSI53C875
7. When the LSI53C875 is performing a block move for
SCSI Phase
This 3-bit field defines the desired SCSI information
transfer phase. When the LSI53C875 operates in Initiator
mode, these bits are compared with the latched SCSI
phase bits in the
When the LSI53C875 operates in Target mode, the
LSI53C875 asserts the phase defined in this field. The
following table describes the possible combinations and
the corresponding SCSI phase.
MSG C_D
0
0
0
0
1
1
1
1
Transfer Counter
This 24-bit field specifies the number of data bytes to be
moved between the LSI53C875 and system memory.
The field is stored in the
ister. When the LSI53C875 transfers data to/from mem-
ory, the DBC register is decremented by the number of
in the
LSI53C875 generates a phase mismatch interrupt
and the instruction is not executed.
has performed a select with Attention (or SATN/ is
manually asserted with a Set ATN instruction), the
LSI53C875 deasserts SATN/ during the final
SREQ/SACK/ handshake.
Message-In phase, it does not deassert the SACK/
signal for the last SREQ/SACK/ handshake. Clear the
SACK/ signal using the Clear SACK I/O instruction.
0
0
1
1
0
0
1
1
SCSI Status One (SSTAT1)
I_O
0
1
0
1
0
1
0
1
SCSI Status One (SSTAT1)
SCSI Phase
Data-Out
Data-In
Command
Status
Reserved-Out
Reserved-In
Message-Out
Message-In
DMA Byte Counter (DBC)
register, the
register.
[26:24]
[23:0]
reg-
6-11