LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 27

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

2.1.4 Internal SCRIPTS RAM
2.1.5 SDMS Software: The Total SCSI Solution
or SCSI-3 logical bus definitions without sacrificing I/O performance.
SCSI SCRIPTS are hardware independent, so they can be used
interchangeably on any host or CPU system bus.
The LSI53C875 has 4 Kbyte (1024 x 32 bits) of internal, general purpose
RAM. The RAM is designed for SCRIPTS program storage, but is not
limited to this type of information. When the chip fetches SCRIPTS
instructions or Table Indirect information from the internal RAM, these
fetches remain internal to the chip and do not use the PCI bus. Other
types of access to the RAM by the LSI53C875 use the PCI bus, as if
they were external accesses. The MAD5 pin enables the 4 Kbyte internal
RAM. To disable the internal RAM, connect a 4.7 k
the MAD5 pin and V
The RAM can be relocated by the PCI system BIOS anywhere in 32-bit
address space. The RAM Base Address register in PCI configuration
space contains the base address of the internal RAM. This register is
similar to the ROM Base Address register in PCI configuration space. To
simplify loading of SCRIPTS instructions, the base address of the RAM
will appear in the
the
from the PCI bus and is visible to any bus mastering device on the bus.
External accesses to the RAM (by the CPU) follow the same timing
sequence as a standard slave register access, except that the target
wait-states required drop from 5 to 3.
A complete set of development tools is available for writing custom
drivers with SCSI SCRIPTS. For more information on the SCSI SCRIPTS
instructions supported by the LSI53C875, see
of the I/O Processor.”
For users who do not need to develop custom drivers, LSI Logic provides
a total SCSI solution in PC environments with the SDMS. SDMS
software provides BIOS driver support for hard disk, tape, and removable
media peripherals for the major PC-based operating systems.
SCSI Functional Description
Chip Test Two (CTEST2)
Scratch Register B (SCRATCHB)
SS
.
register is set. The RAM is byte accessible
Chapter 6, “Instruction Set
register when bit 3 of
resistor between
2-3