ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 132
ATMEGA2561V
Manufacturer Part Number
ATMEGA2561V
Description
8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA2561V.pdf
(449 pages)
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ATmega640/1280/1281/2560/2561
Table 75 shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to
phase correct PWM mode.
Table 78. Compare Output Mode, Phase Correct PWM Mode
Note:
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the
counting sequence of the counter, the source for maximum (TOP) counter value, and
what type of waveform generation to be used, see Table 79. Modes of operation sup-
ported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare
Match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes (see
“Modes of Operation” on page 149).
Table 79. Waveform Generation Mode Bit Description
Notes:
Mode
COM0B1
0
1
2
3
4
5
6
7
0
0
1
1
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case,
1. MAX
2. BOTTOM = 0x00
WGM2
the Compare Match is ignored, but the set or clear is done at TOP. See “Phase Cor-
rect PWM Mode” on page 126 for more details.
0
0
0
0
1
1
1
1
COM0B0
WGM1
0
1
0
1
= 0xFF
0
0
1
1
0
0
1
1
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
WGM0
0
1
0
1
0
1
0
1
Timer/Counter
Mode of
Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
–
–
(1)
Immediate
Immediate
Update of
BOTTOM
OCRx at
TOP
TOP
TOP
–
–
2549K–AVR–01/07
Set on
TOV Flag
BOTTOM
BOTTOM
MAX
MAX
MAX
TOP
–
–
(1)(2)
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