ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 257

• Manufacturer Part Number: ATMEGA2561V
• Description: 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

2549K–AVR–01/07
Figure 100. Data Transfer in Master Transmitter Mode
A START condition is sent by writing the following value to TWCR:
TWEN must be set to enable the 2-wire Serial Interface, TWSTA must be written to one
to transmit a START condition and TWINT must be written to one to clear the TWINT
Flag. The TWI will then test the 2-wire Serial Bus and generate a START condition as
soon as the bus becomes free. After a START condition has been transmitted, the
TWINT Flag is set by hardware, and the status code in TWSR will be 0x08 (see Table
118). In order to enter MT mode, SLA+W must be transmitted. This is done by writing
SLA+W to TWDR. Thereafter the TWINT bit should be cleared (by writing it to one) to
continue the transfer. This is accomplished by writing the following value to TWCR:
When SLA+W have been transmitted and an acknowledgement bit has been received,
TWINT is set again and a number of status codes in TWSR are possible. Possible sta-
tus codes in Master mode are 0x18, 0x20, or 0x38. The appropriate action to be taken
for each of these status codes is detailed in Table 118.
When SLA+W has been successfully transmitted, a data packet should be transmitted.
This is done by writing the data byte to TWDR. TWDR must only be written when
TWINT is high. If not, the access will be discarded, and the Write Collision bit (TWWC)
will be set in the TWCR Register. After updating TWDR, the TWINT bit should be
cleared (by writing it to one) to continue the transfer. This is accomplished by writing the
following value to TWCR:
This scheme is repeated until the last byte has been sent and the transfer is ended by
generating a STOP condition or a repeated START condition. A STOP condition is gen-
erated by writing the following value to TWCR:
A REPEATED START condition is generated by writing the following value to TWCR:
TWCR
value
TWCR
value
TWCR
value
TWCR
value
TWCR
value
SDA
SCL
TWINT
TWINT
TWINT
TWINT
TWINT
1
1
1
1
1
TRANSMITTER
Device 1
MASTER
TWEA
TWEA
TWEA
TWEA
TWEA
ATmega640/1280/1281/2560/2561
X
X
X
X
X
Device 2
RECEIVER
SLAVE
TWSTA
TWSTA
TWSTA
TWSTA
TWSTA
1
0
0
0
1
Device 3
TWSTO
TWSTO
TWSTO
TWSTO
TWSTO
0
0
0
1
0
........
TWWC
TWWC
TWWC
TWWC
TWWC
X
X
X
X
X
Device n
V
CC
TWEN
TWEN
TWEN
TWEN
TWEN
1
1
1
1
1
R1
–
0
–
0
–
0
–
0
–
0
R2
TWIE
TWIE
TWIE
TWIE
TWIE
X
X
X
X
X
257