ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 138
ATMEGA2561V
Manufacturer Part Number
ATMEGA2561V
Description
8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA2561V.pdf
(449 pages)
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Registers
138
ATmega640/1280/1281/2560/2561
Figure 48. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNTn), Output Compare Registers (OCRnA/B/C), and Input Cap-
ture Register (ICRn) are all 16-bit registers. Special procedures must be followed when
accessing the 16-bit registers. These procedures are described in the section “Access-
ing 16-bit Registers” on page 139. The Timer/Counter Control Registers (TCCRnA/B/C)
are 8-bit registers and have no CPU access restrictions. Interrupt requests (shorten as
Int.Req.) signals are all visible in the Timer Interrupt Flag Register (TIFRn). All interrupts
are individually masked with the Timer Interrupt Mask Register (TIMSKn). TIFRn and
TIMSKn are not shown in the figure since these registers are shared by other timer
units.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock
source on the Tn pin. The Clock Select logic block controls which clock source and edge
the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is
inactive when no clock source is selected. The output from the clock select logic is
referred to as the timer clock (clk
The double buffered Output Compare Registers (OCRnA/B/C) are compared with the
Timer/Counter value at all time. The result of the compare can be used by the Waveform
Generator to generate a PWM or variable frequency output on the Output Compare pin
(OCnA/B/C). See “Output Compare Units” on page 146.. The compare match event will
1. Refer to Figure 1 on page 2, Table 41 on page 92, and Table 47 on page 96 for
Timer/Counter1 and 3 and 3 pin placement and description.
Timer/Counter
OCRnB
TCCRnA
OCRnA
OCRnC
TCNTn
ICRn
=
=
=
Direction
T
Count
Clear
n
).
Control Logic
TOP
=
TCCRnB
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
(1)
TCLK
Detector
Edge
=
0
OCFnA
(Int.Req.)
OCFnB
(Int.Req.)
OCFnC
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
Generation
( From Prescaler )
Waveform
Waveform
Waveform
Canceler
TCCRnC
Detector
Noise
Edge
Comparator Ouput )
( From Analog
2549K–AVR–01/07
OCnA
OCnB
OCnC
ICPn
Tn
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