ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 83

• Manufacturer Part Number: ATMEGA2561V
• Description: 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

I/O-Ports
Introduction
2549K–AVR–01/07
All AVR ports have true Read-Modify-Write functionality when used as general digital
I/O ports. This means that the direction of one port pin can be changed without uninten-
tionally changing the direction of any other pin with the SBI and CBI instructions. The
same applies when changing drive value (if configured as output) or enabling/disabling
of pull-up resistors (if configured as input). Each output buffer has symmetrical drive
characteristics with both high sink and source capability. The pin driver is strong enough
to drive LED displays directly. All port pins have individually selectable pull-up resistors
with a supply-voltage invariant resistance. All I/O pins have protection diodes to both
V
374 for a complete list of parameters.
Figure 32. I/O Pin Equivalent Schematic
All registers and bit references in this section are written in general form. A lower case
“x” represents the numbering letter for the port, and a lower case “n” represents the bit
number. However, when using the register or bit defines in a program, the precise form
must be used. For example, PORTB3 for bit no. 3 in Port B, here documented generally
as PORTxn. The physical I/O Registers and bit locations are listed in “Table 70 and
Table 71 relates the alternate functions of Port L to the overriding signals shown in Fig-
ure 36 on page 89.” on page 114.
Three I/O memory address locations are allocated for each port, one each for the Data
Register – PORTx, Data Direction Register – DDRx, and the Port Input Pins – PINx. The
Port Input Pins I/O location is read only, while the Data Register and the Data Direction
Register are read/write. However, writing a logic one to a bit in the PINx Register, will
result in a toggle in the corresponding bit in the Data Register. In addition, the Pull-up
Disable – PUD bit in MCUCR disables the pull-up function for all pins in all ports when
set.
Using the I/O port as General Digital I/O is described in “Ports as General Digital I/O” on
page 84. Most port pins are multiplexed with alternate functions for the peripheral fea-
tures on the device. How each alternate function interferes with the port pin is described
in “Alternate Port Functions” on page 89. Refer to the individual module sections for a
full description of the alternate functions.
CC
and Ground as indicated in Figure 32. Refer to “Electrical Characteristics” on page
Pxn
ATmega640/1280/1281/2560/2561
C
pin
"General Digital I/O" for
See Figure
R
Details
pu
Logic
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