ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 209
ATMEGA2561V
Manufacturer Part Number
ATMEGA2561V
Description
8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA2561V.pdf
(449 pages)
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USART
Quad USART
Overview
2549K–AVR–01/07
The Universal Synchronous and Asynchronous serial Receiver and Transmitter
(USART) is a highly flexible serial communication device. The main features are:
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The ATmega640/1280/2560 has four USART’s, USART0, USART1, USART2, and
USART3. The functionality for all four USART’s is described below. USART0, USART1,
USART2, and USART3 have different I/O registers as shown in “Register Summary” on
page 416.
A simplified block diagram of the USART Transmitter is shown in Figure 82 on page
210. CPU accessible I/O Registers and I/O pins are shown in bold.
The Power Reducion USART0 bit, PRUSART0, in “PRR0 – Power Reduction Register
0” on page 55 must be disabled by writing a logical zero to it.
The Power Reducion USART1 bit, PRUSART1, in “PRR1 – Power Reduction Register
1” on page 56 must be disabled by writing a logical zero to it.
The Power Reducion USART2 bit, PRUSART2, in “PRR1 – Power Reduction Register
1” on page 56 must be disabled by writing a logical zero to it.
The Power Reducion USART3 bit, PRUSART3, in “PRR1 – Power Reduction Register
1” on page 56 must be disabled by writing a logical zero to it.
Full Duplex Operation (Independent Serial Receive and Transmit Registers)
Asynchronous or Synchronous Operation
Master or Slave Clocked Synchronous Operation
High Resolution Baud Rate Generator
Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits
Odd or Even Parity Generation and Parity Check Supported by Hardware
Data OverRun Detection
Framing Error Detection
Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter
Three Separate Interrupts on TX Complete, TX Data Register Empty and RX Complete
Multi-processor Communication Mode
Double Speed Asynchronous Communication Mode
ATmega640/1280/1281/2560/2561
209
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