ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 178

• Manufacturer Part Number: ATMEGA2561V
• Description: 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

178
ATmega640/1280/1281/2560/2561
Figure 67. Counter Unit Block Diagram
Signal description (internal signals):
Depending on the mode of operation used, the counter is cleared, incremented, or dec-
remented at each timer clock (clk
clock source, selected by the Clock Select bits (CS22:0). When no clock source is
selected (CS22:0 = 0) the timer is stopped. However, the TCNT2 value can be accessed
by the CPU, regardless of whether clk
priority over) all counter clear or count operations.
The counting sequence is determined by the setting of the WGM21 and WGM20 bits
located in the Timer/Counter Control Register (TCCR2A) and the WGM22 located in the
Timer/Counter Control Register B (TCCR2B). There are close connections between
how the counter behaves (counts) and how waveforms are generated on the Output
Compare outputs OC2A and OC2B. For more details about advanced counting
sequences and waveform generation, see “Modes of Operation” on page 179.
The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation
selected by the WGM22:0 bits. TOV2 can be used for generating a CPU interrupt.
count
direction
clear
clk
top
bottom
Tn
DATA BUS
TCNTn
Increment or decrement TCNT2 by 1.
Selects between increment and decrement.
Clear TCNT2 (set all bits to zero).
Timer/Counter clock, referred to as clk
Signalizes that TCNT2 has reached maximum value.
Signalizes that TCNT2 has reached minimum value (zero).
direction
count
clear
bottom
T2
). clk
Control Logic
T2
T2
is present or not. A CPU write overrides (has
can be generated from an external or internal
top
TOVn
(Int.Req.)
clk
Tn
Prescaler
T2
in the following.
Oscillator
T/C
2549K–AVR–01/07
clk
I/O
TOSC2
TOSC1