ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 331

• Manufacturer Part Number: ATMEGA2561V
• Description: 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Reading the Fuse and Lock
Bits from Software
Reading the Signature Row
from Software
2549K–AVR–01/07
It is possible to read both the Fuse and Lock bits from software. To read the Lock bits,
load the Z-pointer with 0x0001 and set the BLBSET and SPMEN bits in SPMCSR.
When an (E)LPM instruction is executed within three CPU cycles after the BLBSET and
SPMEN bits are set in SPMCSR, the value of the Lock bits will be loaded in the destina-
tion register. The BLBSET and SPMEN bits will auto-clear upon completion of reading
the Lock bits or if no (E)LPM instruction is executed within three CPU cycles or no SPM
instruction is executed within four CPU cycles. When BLBSET and SPMEN are cleared,
(E)LPM will work as described in the Instruction set Manual.
The algorithm for reading the Fuse Low byte is similar to the one described above for
reading the Lock bits. To read the Fuse Low byte, load the Z-pointer with 0x0000 and
set the BLBSET and SPMEN bits in SPMCSR. When an (E)LPM instruction is executed
within three cycles after the BLBSET and SPMEN bits are set in the SPMCSR, the value
of the Fuse Low byte (FLB) will be loaded in the destination register as shown below.
Refer to Table 153 on page 344 for a detailed description and mapping of the Fuse Low
byte.
Similarly, when reading the Fuse High byte, load 0x0003 in the Z-pointer. When an
(E)LPM instruction is executed within three cycles after the BLBSET and SPMEN bits
are set in the SPMCSR, the value of the Fuse High byte (FHB) will be loaded in the des-
tination register as shown below. Refer to Table 152 on page 344 for detailed
description and mapping of the Fuse High byte.
When reading the Extended Fuse byte, load 0x0002 in the Z-pointer. When an (E)LPM
instruction is executed within three cycles after the BLBSET and SPMEN bits are set in
the SPMCSR, the value of the Extended Fuse byte (EFB) will be loaded in the destina-
tion register as shown below. Refer to Table 151 on page 343 for detailed description
and mapping of the Extended Fuse byte.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that
are unprogrammed, will be read as one.
To read the Signature Row from software, load the Z-pointer with the signature byte
address given in Table 138 on page 332 and set the SIGRD and SPMEN bits in
SPMCSR. When an LPM instruction is executed within three CPU cycles after the
SIGRD and SPMEN bits are set in SPMCSR, the signature byte value will be loaded in
the destination register. The SIGRD and SPMEN bits will auto-clear upon completion of
reading the Signature Row Lock bits or if no LPM instruction is executed within three
Bit
Rd
Bit
Rd
Bit
Rd
Bit
Rd
FHB7
FLB7
7
7
7
–
7
–
FHB6
FLB6
ATmega640/1280/1281/2560/2561
6
6
6
–
6
–
BLB12
FHB5
FLB5
5
5
5
–
5
BLB11
FHB4
FLB4
4
4
4
4
–
BLB02
FLB3
FHB3
3
3
3
3
–
BLB01
FHB2
EFB2
FLB2
2
2
2
2
FHB1
EFB1
FLB1
LB2
1
1
1
1
FHB0
EFB0
FLB0
LB1
0
0
0
0
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