ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 99

• Manufacturer Part Number: ATMEGA2561V
• Description: 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Alternate Functions of Port E
2549K–AVR–01/07
Table 50. Overriding Signals for Alternate Functions in PD3:PD0
Note:
The Port E pins with alternate functions are shown in Table 51.
Table 51. Port E Pins Alternate Functions
Note:
• INT7/ICP3/CLKO – Port E, Bit 7
INT7, External Interrupt source 7: The PE7 pin can serve as an external interrupt
source.
ICP3, Input Capture Pin 3: The PE7 pin can act as an input capture pin for
Timer/Counter3.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Port Pin
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
1. When enabled, the 2-wire Serial Interface enables Slew-Rate controls on the output
1. Only for
pins PD0 and PD1. This is not shown in this table. In addition, spike filters are con-
nected between the AIO outputs shown in the port figure and the digital logic of the
TWI module.
placed on MISO/MOSI pins.
Alternate Function
INT7/ICP3/CLK0 (External Interrupt 7 Input, Timer/Counter3 Input Capture Trigger
or Divided System Clock)
INT6/ T3 (External Interrupt 6 Input or Timer/Counter3 Clock Input)
INT5/OC3C (External Interrupt 5 Input or Output Compare and PWM Output C for
Timer/Counter3)
INT4/OC3B (External Interrupt4 Input or Output Compare and PWM Output B for
Timer/Counter3)
AIN1/OC3A (Analog Comparator Negative Input or Output Compare and PWM
Output A for Timer/Counter3)
AIN0/XCK0 (Analog Comparator Positive Input or USART0 external clock
input/output)
PDO
PDI
Change Interrupt 8)
(1)
PD3/INT3/TXD1
TXEN1
0
TXEN1
1
TXEN1
TXD1
INT3 ENABLE
1
INT3 INPUT
–
(1)
/RXD0/PCINT8 (Programming Data Input, USART0 Receive Pin or Pin
/TXD0 (Programming Data Output or USART0 Transmit Pin)
ATmega1281/2561
ATmega640/1280/1281/2560/2561
PD2/INT2/RXD1
RXEN1
PORTD2 • PUD
RXEN1
0
0
0
INT2 ENABLE
1
INT2 INPUT/RXD1
–
. For
ATmega640/1280/2560
PD1/INT1/SDA
TWEN
PORTD1 • PUD
TWEN
SDA_OUT
TWEN
0
INT1 ENABLE
1
INT1 INPUT
SDA INPUT
(1)
these functions are
PD0/INT0/SCL
TWEN
PORTD0 • PUD
TWEN
SCL_OUT
TWEN
0
INT0 ENABLE
1
INT0 INPUT
SCL INPUT
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