ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 298

• Manufacturer Part Number: ATMEGA2561V
• Description: 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

ADCL and ADCH – The ADC
Data Register
ADLAR = 0
ADLAR = 1
298
ATmega640/1280/1281/2560/2561
Table 130. ADC Prescaler Selections
When an ADC conversion is complete, the result is found in these two registers. If differ-
ential channels are used, the result is presented in two’s complement form.
When ADCL is read, the ADC Data Register is not updated until ADCH is read. Conse-
quently, if the result is left adjusted and no more than 8-bit precision (7 bit + sign bit for
differential input channels) is required, it is sufficient to read ADCH. Otherwise, ADCL
must be read first, then ADCH.
The ADLAR bit in ADMUX, and the MUXn bits in ADMUX affect the way the result is
read from the registers. If ADLAR is set, the result is left adjusted. If ADLAR is cleared
(default), the result is right adjusted.
• ADC9:0: ADC Conversion Result
These bits represent the result from the conversion, as detailed in “ADC Conversion
Result” on page 292.
Bit
(0x79)
(0x78)
Read/Write
Initial Value
Bit
(0x79)
(0x78)
Read/Write
Initial Value
ADPS2
0
0
0
0
1
1
1
1
ADC7
ADC9
ADC1
15
15
R
R
R
R
–
7
0
0
7
0
0
ADC6
ADC8
ADC0
14
14
R
R
R
R
–
6
0
0
6
0
0
ADPS1
ADC5
ADC7
13
13
R
R
R
R
0
0
1
1
0
0
1
1
–
5
0
0
–
5
0
0
ADC4
ADC6
12
12
R
R
R
R
–
4
0
0
–
4
0
0
ADC3
ADC5
11
11
–
3
R
R
0
0
–
3
R
R
0
0
ADPS0
0
1
0
1
0
1
0
1
ADC2
ADC4
10
10
R
R
R
R
–
2
0
0
–
2
0
0
ADC9
ADC1
ADC3
9
1
R
R
0
0
9
–
1
R
R
0
0
Division Factor
ADC8
ADC0
ADC2
R
R
R
R
8
0
0
0
8
–
0
0
0
2549K–AVR–01/07
128
16
32
64
2
2
4
8
ADCH
ADCH
ADCL
ADCL