ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 137

• Manufacturer Part Number: ATMEGA2561V
• Description: 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

16-bit Timer/Counter (Timer/Counter 1, 3, 4, and 5)
Overview
2549K–AVR–01/07
The 16-bit Timer/Counter unit allows accurate program execution timing (event man-
agement), wave generation, and signal timing measurement. The main features are:
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Most register and bit references in this section are written in general form. A lower case
“n” replaces the Timer/Counter number, and a lower case “x” replaces the Output Com-
pare unit channel. However, when using the register or bit defines in a program, the
precise form must be used, i.e., TCNT1 for accessing Timer/Counter1 counter value
and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in Figure 48. For the
actual placement of I/O pins, see “TQFP-pinout ATmega640/1280/2560” on page 2 and
“Pinout ATmega1281/2561” on page 4. CPU accessible I/O Registers, including I/O bits
and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are
listed in the “Register Description” on page 160.
The Power Reduction Timer/Counter1 bit, PRTIM1, in “PRR0 – Power Reduction Regis-
ter 0” on page 55 must be written to zero to enable Timer/Counter1 module.
The Power Reduction Timer/Counter3 bit, PRTIM3, in “PRR1 – Power Reduction Regis-
ter 1” on page 56 must be written to zero to enable Timer/Counter3 module.
The Power Reduction Timer/Counter4 bit, PRTIM4, in “PRR1 – Power Reduction Regis-
ter 1” on page 56 must be written to zero to enable Timer/Counter4 module.
The Power Reduction Timer/Counter5 bit, PRTIM5, in “PRR1 – Power Reduction Regis-
ter 1” on page 56 must be written to zero to enable Timer/Counter5 module.
T i m e r / C o u n t e r 4 a n d T i m e r / C o u n t e r 5 o n l y h a v e f u l l f u n c t i o n a l i t y i n t h e
ATmega640/1280/2560. Input capture and output compare are not available in the
ATmega1281/2561.
True 16-bit Design (i.e., Allows 16-bit PWM)
Three independent Output Compare Units
Double Buffered Output Compare Registers
One Input Capture Unit
Input Capture Noise Canceler
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
External Event Counter
Twenty independent interrupt sources (TOV1, OCF1A, OCF1B, OCF1C, ICF1, TOV3,
OCF3A, OCF3B, OCF3C, ICF3, TOV4, OCF4A, OCF4B, OCF4C, ICF4, TOV5, OCF5A,
OCF5B, OCF5C and ICF5)
ATmega640/1280/1281/2560/2561
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