ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 356
ATMEGA2561V
Manufacturer Part Number
ATMEGA2561V
Description
8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA2561V.pdf
(449 pages)
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Serial Programming Pin
Mapping
356
ATmega640/1280/1281/2560/2561
Table 162. Parallel Programming Characteristics, V
Notes:
Both the Flash and EEPROM memory arrays can be programmed using a serial pro-
gramming bus while RESET is pulled to GND. The serial programming interface
consists of pins SCK, PDI (input) and PDO (output). After RESET is set low, the Pro-
gramming Enable instruction needs to be executed first before program/erase
operations can be executed. NOTE, in Table 163 on page 356, the pin mapping for
serial programming is listed. Not all packages use the SPI pins dedicated for the internal
Serial Peripheral Interface - SPI.
Table 163. Pin Mapping Serial Programming
Figure 147. Serial Programming and Verify
Notes:
Symbol
t
t
t
BVDV
OLDV
OHDZ
Symbol
PDO
SCK
PDI
1.
2. t
1. If the device is clocked by the internal Oscillator, it is no need to connect a clock
2. V
bits commands.
source to the XTAL1 pin.
t
WLRH_CE
WLRH
CC
Parameter
BS1 Valid to DATA valid
OE Low to DATA Valid
OE High to DATA Tri-stated
- 0.3V < AVCC < V
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock
is valid for the Chip Erase command.
(TQFP-100)
Pins
PB2
PB3
PB1
PDO
SCK
PDI
CC
+ 0.3V, however, AVCC should always be within 1.8 - 5.5V
XTAL1
RESET
GND
(TQFP-64)
Pins
PE0
PE1
PB1
(1)
AVCC
VCC
CC
= 5V ± 10% (Continued)
+1.8 - 5.5V
+1.8 - 5.5V
I/O
O
Min
I
I
0
(2)
Typ
Serial Data out
Serial Data in
Description
Serial Clock
Max
250
250
250
2549K–AVR–01/07
Units
ns
ns
ns
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