ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 245

• Manufacturer Part Number: ATMEGA2561V
• Description: 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

2-wire Serial Interface
Features
2-wire Serial Interface
Bus Definition
TWI Terminology
2549K–AVR–01/07
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The 2-wire Serial Interface (TWI) is ideally suited for typical microcontroller applications.
The TWI protocol allows the systems designer to interconnect up to 128 different
devices using only two bi-directional bus lines, one for clock (SCL) and one for data
(SDA). The only external hardware needed to implement the bus is a single pull-up
resistor for each of the TWI bus lines. All devices connected to the bus have individual
addresses, and mechanisms for resolving bus contention are inherent in the TWI
protocol.
Figure 90. TWI Bus Interconnection
The following definitions are frequently encountered in this section.
Table 117. TWI Terminology
The Power Reduction TWI bit, PRTWI bit in “PRR0 – Power Reduction Register 0” on
page 55 must be written to zero to enable the 2-wire Serial Interface.
Term
Master
Slave
Transmitter
Receiver
Simple yet Powerful and Flexible Communication Interface, only two Bus Lines needed
Both Master and Slave Operation Supported
Device can Operate as Transmitter or Receiver
7-bit Address Space Allows up to 128 Different Slave Addresses
Multi-master Arbitration Support
Up to 400 kHz Data Transfer Speed
Slew-rate Limited Output Drivers
Noise Suppression Circuitry Rejects Spikes on Bus Lines
Fully Programmable Slave Address with General Call Support
Address Recognition Causes Wake-up When AVR is in Sleep Mode
SDA
SCL
Description
The device that initiates and terminates a transmission. The Master also
generates the SCL clock.
The device addressed by a Master.
The device placing data on the bus.
The device reading data from the bus.
Device 1
ATmega640/1280/1281/2560/2561
Device 2
Device 3
........
Device n
V
CC
R1
R2
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