ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 162
ATMEGA2561V
Manufacturer Part Number
ATMEGA2561V
Description
8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA2561V.pdf
(449 pages)
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TCCR1B – Timer/Counter 1
Control Register B
TCCR3B – Timer/Counter 3
Control Register B
TCCR4B – Timer/Counter 4
Control Register B
TCCR5B – Timer/Counter 5
Control Register B
162
ATmega640/1280/1281/2560/2561
• Bit 7 – ICNCn: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the Noise
Canceler is activated, the input from the Input Capture Pin (ICPn) is filtered. The filter
function requires four successive equal valued samples of the ICPn pin for changing its
output. The input capture is therefore delayed by four Oscillator cycles when the noise
canceler is enabled.
• Bit 6 – ICESn: Input Capture Edge Select
This bit selects which edge on the Input Capture Pin (ICPn) that is used to trigger a cap-
ture event. When the ICESn bit is written to zero, a falling (negative) edge is used as
trigger, and when the ICESn bit is written to one, a rising (positive) edge will trigger the
capture.
When a capture is triggered according to the ICESn setting, the counter value is copied
into the Input Capture Register (ICRn). The event will also set the Input Capture Flag
(ICFn), and this can be used to cause an Input Capture Interrupt, if this interrupt is
enabled.
When the ICRn is used as TOP value (see description of the WGMn3:0 bits located in
the TCCRnA and the TCCRnB Register), the ICPn is disconnected and consequently
the input capture function is disabled.
• Bit 5 – Reserved Bit
This bit is reserved for future use. For ensuring compatibility with future devices, this bit
must be written to zero when TCCRnB is written.
• Bit 4:3 – WGMn3:2: Waveform Generation Mode
See TCCRnA Register description.
Bit
(0x81)
Read/Write
Initial Value
Bit
(0x91)
Read/Write
Initial Value
Bit
(0xA1)
Read/Write
Initial Value
Bit
(0x121)
Read/Write
Initial Value
ICNC1
ICNC3
ICNC4
ICNC5
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
ICES1
ICES3
ICES4
ICES5
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
R
R
R
R
5
–
0
5
–
0
5
–
0
5
–
0
WGM33
WGM43
WGM53
WGM13
R/W
R/W
R/W
R/W
4
0
4
0
4
0
4
0
WGM12
WGM32
WGM42
WGM52
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
CS12
CS32
CS42
CS52
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
CS31
CS41
CS51
CS11
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
CS30
CS40
CS50
CS10
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
2549K–AVR–01/07
TCCR3B
TCCR4B
TCCR5B
TCCR1B
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