ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 212
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
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23.8.5
Name:
Access Type:
•
0 = No data has been received since the last read of RDR
1 = Data has been received and the received data has been transferred from the serializer to RDR since the last read of
RDR.
• TDRE: Transmit Data Register Empty
0 = Data has been written to TDR and not yet transferred to the serializer.
1 = The last data written in the Transmit Data Register has been transferred to the serializer.
TDRE equals zero when the SPI is disabled or at reset. The SPI enable command sets this bit to one.
• MODF: Mode Fault Error
0 = No Mode Fault has been detected since the last read of SR.
1 = A Mode Fault occurred since the last read of the SR.
• OVRES: Overrun Error Status
0 = No overrun has been detected since the last read of SR.
1 = An overrun has occurred since the last read of SR.
An overrun occurs when RDR is loaded at least twice from the serializer since the last read of the RDR.
•
0 = The Receive Counter Register has not reached 0 since the last write in RCR or RNCR.
1 = The Receive Counter Register has reached 0 since the last write in RCR or RNCR.
•
0 = The Transmit Counter Register has not reached 0 since the last write in TCR or TNCR.
1 = The Transmit Counter Register has reached 0 since the last write in TCR or TNCR.
•
0 = RCR or RNCR has a value other than 0.
1 = Both RCR and RNCR has a value of 0.
•
0 = TCR or TNCR has a value other than 0.
32058J-AVR32-04/11
RDRF: Receive Data Register Full
ENDRX: End of RX buffer
ENDTX: End of TX buffer
RXBUFF: RX Buffer Full
TXBUFE: TX Buffer Empty
TXBUFE
31
23
15
–
–
–
7
SPI Status Register
RXBUFF
30
22
14
–
–
–
6
ENDTX
29
21
13
–
–
–
5
SR
Read-only
ENDRX
28
20
12
–
–
–
4
OVRES
27
19
11
–
–
–
3
MODF
26
18
10
–
–
–
2
TXEMPTY
TDRE
25
17
–
–
9
1
AT32UC3A
SPIENS
NSSR
RDRF
24
16
–
8
0
212
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