ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 222
![KIT DEV/EVAL FOR AVR32 AT32UC3A](/photos/9/20/92035/atevk1104_sml.jpg)
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
- Current page: 222 of 826
- Download datasheet (20Mb)
24.5
Figure 24-2. Application Block Diagram
24.6
Table 24-3.
24.7
24.7.1
24.7.2
32058J-AVR32-04/11
Pin Name
TWD
TWCK
Application Block Diagram
I/O Lines Description
Product Dependencies
I/O Lines
Power Management
I/O Lines Description
Rp: Pull up value as given by the I²C Standard
Host with
Interface
TWI
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current
source or pull-up resistor (see
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with GPIO lines. To enable the TWI, the programmer
must perform the following steps:
• Program the GPIO controller to:
The TWI clock is generated by the Power Manager (PM). Before using the TWI, the programmer
must ensure that the TWI clock is enabled in the PM.
In the TWI description, Master Clock (MCK) is the clock of the peripheral bus to which the TWI is
connected.
TWD
TWCK
– Dedicate TWD and TWCK as peripheral lines.
– Define TWD and TWCK as open-drain.
Serial EEPROM
Pin Description
Two-wire Serial Data
Two-wire Serial Clock
Atmel TWI
Slave 1
I²C RTC
Slave 2
Figure 24-2 on page
Controller
I²C LCD
Slave 3
I²C Temp.
222). When the bus is free, both lines are
Slave 4
Sensor
Rp
Rp
AT32UC3A
VDD
Input/Output
Input/Output
Type
222
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