ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 405

KIT DEV/EVAL FOR AVR32 AT32UC3A

ATEVK1104

Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets

Specifications of ATEVK1104

Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
27.7.2
Register Name:
Access Type:
Offset:
Reset Value:
• NCS_RD_PULSE: NCS Pulse Length in READ Access
In standard read access, the NCS signal pulse length is defined as:
NCS pulse length = (256* NCS_RD_PULSE[6] + NCS_RD_PULSE[5:0]) clock cycles
The NCS pulse length must be at least 1 clock cycle.
In page mode read access, the NCS_RD_PULSE parameter defines the duration of the first access to one page.
• NRD_PULSE: NRD Pulse Length
In standard read access, the NRD signal pulse length is defined in clock cycles as:
NRD pulse length = (256* NRD_PULSE[6] + NRD_PULSE[5:0]) clock cycles
The NRD pulse length must be at least 1 clock cycle.
In page mode read access, the NRD_PULSE parameter defines the duration of the subsequent accesses in the page.
• NCS_WR_PULSE: NCS Pulse Length in WRITE Access
In write access, the NCS signal pulse length is defined as:
NCS pulse length = (256* NCS_WR_PULSE[6] + NCS_WR_PULSE[5:0]) clock cycles
The NCS pulse length must be at least 1 clock cycle.
• NWE_PULSE: NWE Pulse Length
The NWE signal pulse length is defined as:
NWE pulse length = (256* NWE_PULSE[6] + NWE_PULSE[5:0]) clock cycles
The NWE pulse length must be at least 1 clock cycle.
32058J–AVR32–04/11
31
23
15
7
Pulse Register
30
22
14
PULSE[0..3]
Read/Write
0x10 x CS_number + 0x04
6
29
21
13
5
28
20
12
4
NCS_WR_PULSE
NCS_RD_PULSE
NWE_PULSE
NRD_PULSE
27
19
11
3
26
18
10
2
25
17
9
1
AT32UC3A
24
16
8
0
405

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