ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 599
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
- Current page: 599 of 826
- Download datasheet (20Mb)
• HWUPI: Host Wake-Up Interrupt Flag
Asynchronous interrupt.
Set by hardware in the following cases :
Note that this interrupt is generated even if the clock is frozen by the FRZCLK bit.
• PXINT, X in [0..6]: Pipe X Interrupt Flag
Set by hardware when an interrupt is triggered by the endpoint X (UPSTAX). This triggers a USB interrupt if the corre-
sponding pipe interrupt enable bit is set (UHINTE register). Cleared by hardware when the interrupt source is served.
• DMAXINT, X in [1..6]: DMA Channel X Interrupt Flag
Set by hardware when an interrupt is triggered by the DMA channel X. This triggers a USB interrupt if the corresponding
DMAXINTE is set (UHINTE register).
Cleared by hardware when the UHDMAX_STATUS interrupt source is cleared.
32058J–AVR32–04/11
– The Host controller is in the suspend mode (SOFE=0) and an upstream resume from
– The Host controller is in the suspend mode (SOFE=0) and a Peripheral disconnection
– The Host controller is in the Idle state (VBUSRQ=0, no VBus is generated), and an
the Peripheral is detected.
is detected.
OTG SRP event initiated by the Peripheral is detected.
AT32UC3A
599
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