ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 594
![KIT DEV/EVAL FOR AVR32 AT32UC3A](/photos/9/20/92035/atevk1104_sml.jpg)
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
- Current page: 594 of 826
- Download datasheet (20Mb)
AT32UC3A
• EOT_IRQ_EN: End of USB Transfer Interrupt Enable
Set this bit to enable the end of usb OUT data transfer interrupt.
This interrupt is generated only if the BUFF_CLOSE_IN_EN bit is set.
Clear this bit to disable this interrupt.
• EOBUFF_IRQ_EN: End of Buffer Interrupt Enable
Set this bit to enable the end of buffer interrupt.
This interrupt is generated when the channel byte count reaches zero.
Clear this bit to disable this interrupt.
• DESC_LD_IRQ_EN: Descriptor Loaded Interrupt Enable
Set this bit to enable the Descripor Loaded interrupt.
This interrupt is generated when a Descriptor has been loaded from the system bus.
Clear this bit to disable this interrupt.
• BURST_LOCK_EN: Burst Lock Enable
Set this bit to lock the HSB data burst for maximum optimization of HSB busses bandwidth usage and maximization of fly-
by duration.
If clear, the DMA never locks HSB access.
• CH_BYTE_LENGTH: Channel Byte Length
This field determines the total number of bytes to be transferred for this buffer.
The maximum channel transfer size 64 kB is reached when this field is 0 (default value).
If the transfer size is unknown, the transfer end is controlled by the peripheral and this field should be set to 0.
This field can be written by software or descriptor loading only after the UDDMAX_STATUS.CH_EN bit has been cleared,
otherwise this field is ignored.
594
32058J–AVR32–04/11
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