ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 219

• Manufacturer Part Number: ATEVK1104
• Description: KIT DEV/EVAL FOR AVR32 AT32UC3A
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1104

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A3
• Data Bus Width: 32 bit
• Interface Type: USB, SPI, USART
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A3256
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Otherwise, the following equations determine the delay:
If FDIV is 0:
If FDIV is 1:
• DLYBCT: Delay Between Consecutive Transfers
This field defines the delay between two consecutive transfers with the same peripheral without removing the chip select.
The delay is always inserted after each transfer and before removing the chip select if needed.
When DLYBCT equals zero, no delay between consecutive transfers is inserted and the clock keeps its duty cycle over the
character transfers.
Otherwise, the following equation determines the delay:
If FDIV is 0:
If FDIV is 1:
N = 32
32058J-AVR32-04/11
Delay Before SPCK
Delay Before SPCK
Delay Between Consecutive Transfers
Delay Between Consecutive Transfers
Note:
N = 32
=
=
DLYBS
------------------ - -
N
---------------------------- - -
MCK
×
MCK
DLYBS
=
=
32
----------------------------------- -
32
---------------------------------------------- - -
×
×
MCK
DLYBCT
N
MCK
×
DLYBCT
+
---------------- - -
2MCK
SCBR
+
N
------------------------ -
2MCK
×
SCBR
AT32UC3A
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