ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 293
![KIT DEV/EVAL FOR AVR32 AT32UC3A](/photos/9/20/92035/atevk1104_sml.jpg)
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
- Current page: 293 of 826
- Download datasheet (20Mb)
AT32UC3A
1: End of PDCA transfer when Receive Counter Register has arrived at zero.
• OVRUN: Receive Overrun
0: No data has been loaded in RHR while previous data has not been read since the last read of the Status Register.
1: Data has been loaded in RHR while previous data has not yet been read since the last read of the Status Register.
• RXRDY: Receive Ready
0: RHR is empty.
1: Data has been received and loaded in RHR.
• TXBUFE: Transmit Buffer Empty
0: TCR or TNCR have a value other than 0.
1: Both TCR and TNCR have a value of 0.
• ENDTX: End of Transmission
0: The register TCR has not reached 0 since the last write in TCR or TNCR.
1: The register TCR has reached 0 since the last write in TCR or TNCR.
• TXEMPTY: Transmit Empty
0: Data remains in THR or is currently transmitted from TSR.
1: Last data written in THR has been loaded in TSR and last data loaded in TSR has been transmitted.
• TXRDY: Transmit Ready
0: Data has been loaded in THR and is waiting to be loaded in the Transmit Shift Register (TSR).
1: THR is empty.
293
32058J-AVR32-04/11
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