ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 772
![KIT DEV/EVAL FOR AVR32 AT32UC3A](/photos/9/20/92035/atevk1104_sml.jpg)
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
- Current page: 772 of 826
- Download datasheet (20Mb)
38.8
Table 38-17. Channel Conversion Time and ADC Clock
Notes:
Table 38-18. External Voltage Reference Input
Table 38-19. Analog Inputs
Table 38-20. Transfer Characteristics in 8-bit mode
32058J–AVR32–04/11
Parameter
ADC Clock Frequency
ADC Clock Frequency
Startup Time
Track and Hold Acquisition Time
Conversion Time
Conversion Time
Throughput Rate
Throughput Rate
Parameter
ADVREF Input Voltage Range
ADVREF Average Current
Current Consumption on VDDANA
Parameter
Input Voltage Range
Input Leakage Current
Input Capacitance
Parameter
Resolution
Absolute Accuracy
Integral Non-linearity
Differential Non-linearity
Offset Error
Gain Error
ADC Characteristics
1. Corresponds to 13 clock cycles at 5 MHz: 3 clock cycles for track and hold acquisition time and 10 clock cycles for
2. Corresponds to 15 clock cycles at 8 MHz: 5 clock cycles for track and hold acquisition time and 10 clock cycles for
conversion.
conversion.
Note:
ADVREF should be connected to GND to avoid extra consumption in case ADC is not used.
Conditions
On 13 samples with ADC Clock = 5 MHz
Conditions
10-bit resolution mode
8-bit resolution mode
Return from Idle Mode
ADC Clock = 5 MHz
ADC Clock = 8 MHz
ADC Clock = 5 MHz
ADC Clock = 8 MHz
Conditions
f=5MHz
f=8MHz
f=5MHz
f=8MHz
f=5MHz
f=8MHz
f=5MHz
f=5MHz
Min
2.6
Min
Min
-0.5
-0.5
600
Min
0
Typ
200
TBD
0.35
Typ
Typ
Typ
0.5
0.3
0.5
17
8
AT32UC3A
VDDANA
V
Max
TBD
384
533
250
ADVREF
Max
1.25
Max
Max
0.8
1.5
0.5
1.0
0.5
1.0
0.5
0.5
20
5
8
2
(1)
(2)
Units
Units
kSPS
kSPS
Units
Units
MHz
MHz
mA
µA
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
µA
pF
µs
ns
µs
µs
V
Bit
772
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