AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 327

• Manufacturer Part Number: AT32UC3L-EK
• Description: KIT EVAL AVR32 UC3 MCU
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT32UC3L-EK

• Contents: *
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: UC3L
• Kit Contents: Board
• Features: USB / Battery Powered, Board Controller / Bootloader
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Tool Type: Starter Kit
• Cpu Core: AVR 8
• Data Bus Width: 8 bit
• Processor Series: AT32
• Processor To Be Evaluated: AT32UC3L064
• Interface Type: USB, Capacitive Touch
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.4
18.5
18.5.1
18.5.2
18.5.3
18.5.4
18.5.5
32099F–11/2010
Pin Name
GPIOn
I/O Lines Description
Product Dependencies
Power Management
Clocks
Interrupts
Peripheral Events
Debug Operation
In order to use this module, other parts of the system must be configured correctly, as described
below.
If the CPU enters a sleep mode that disables clocks used by the GPIO, the GPIO will stop func-
tioning and resume operation after the system wakes up from sleep mode.
If a peripheral function is configured for a GPIO pin, the peripheral will be able to control the
GPIO pin even if the GPIO clock is stopped.
The GPIO is connected to a Peripheral Bus clock (CLK_GPIO). This clock is generated by the
Power Manager. CLK_GPIO is enabled at reset, and can be disabled by writing to the Power
Manager. CLK_GPIO must be enabled in order to access the configuration registers of the GPIO
or to use the GPIO interrupts. After configuring the GPIO, the CLK_GPIO can be disabled by
writing to the Power Manager if interrupts are not used.
If the CPU Local Bus is used to access the configuration interface of the GPIO, the CLK_GPIO
must be equal to the CPU clock to avoid data loss.
The GPIO interrupt request lines are connected to the interrupt controller. Using the GPIO inter-
rupts requires the interrupt controller to be programmed first.
The GPIO peripheral events are connected via the Peripheral Event System. Refer to the
Peripheral Event System chapter for details.
When an external debugger forces the CPU into debug mode, the GPIO continues normal oper-
ation. If the GPIO is configured in a way that requires it to be periodically serviced by the CPU
through interrupts or similar, improper operation or data loss may result during debugging.
Description
GPIO pin n
AT32UC3L016/32/64
Type
Digital
327