AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 761

• Manufacturer Part Number: AT32UC3L-EK
• Description: KIT EVAL AVR32 UC3 MCU
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT32UC3L-EK

• Contents: *
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: UC3L
• Kit Contents: Board
• Features: USB / Battery Powered, Board Controller / Bootloader
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Tool Type: Starter Kit
• Cpu Core: AVR 8
• Data Bus Width: 8 bit
• Processor Series: AT32
• Processor To Be Evaluated: AT32UC3L064
• Interface Type: USB, Capacitive Touch
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

31.5.3.9
31.5.3.10
32099F–11/2010
HALT
CHIP_ERASE
Table 31-26. AVR_RESET Details (Continued)
This instruction allows a programmer to completely erase all nonvolatile memories in a chip.
This will also clear any security bits that are set, so the device can be accessed normally. In
devices without non-volatile memories this instruction does nothing, and appears to complete
immediately.
The erasing of non-volatile memories starts as soon as the CHIP_ERASE instruction is selected.
The CHIP_ERASE instruction selects a 1 bit bypass data register.
A chip erase operation should be performed as:
Table 31-27. CHIP_ERASE Details
This instruction allows a programmer to easily stop the CPU to ensure that it does not execute
invalid code during programming.
This instruction selects a 1-bit halt register. Setting this bit to one halts the CPU. Setting this bit
to zero releases the CPU to run normally. The value shifted out from the data register is one if
the CPU is halted. Before releasing the halt command the CPU needs to be reset to ensure that
it will start at the reset startup address.
The HALT instruction can be used in the following way:
Instructions
DR Size
DR input value
DR output value
Instructions
IR input value
IR output value
DR Size
DR input value
DR output value
1. Reset the system and stop the CPU from executing.
2. Select the IR Scan path.
3. In Capture-IR: The IR output value is latched into the shift register.
4. In Shift-IR: The instruction register is shifted by the TCK input.
5. Check the busy bit that was scanned out during Shift-IR. If the busy bit was set goto 2.
6. Return to Run-Test/Idle.
1. Select the IR Scan path.
2. In Capture-IR: The IR output value is latched into the shift register.
3. In Shift-IR: The instruction register is shifted by the TCK input.
4. Return to Run-Test/Idle.
5. Select the DR Scan path.
Details
Device specific.
Device specific.
Device specific.
Details
01111 (0x0F)
p0b01
Where b is the busy bit.
1 bit
x
0
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