AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 516
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
AT32UC3L-EK
Manufacturer Part Number
AT32UC3L-EK
Description
KIT EVAL AVR32 UC3 MCU
Manufacturer
Atmel
Type
MCUr
Specifications of AT32UC3L-EK
Contents
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
UC3L
Kit Contents
Board
Features
USB / Battery Powered, Board Controller / Bootloader
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Tool Type
Starter Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor Series
AT32
Processor To Be Evaluated
AT32UC3L064
Interface Type
USB, Capacitive Touch
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3L-EK
Manufacturer:
Atmel
Quantity:
135
- Current page: 516 of 858
- Download datasheet (13Mb)
• SWRST: Software Reset
• STREN: Clock Stretch Enable
• GCMATCH: General Call Address Match
• SMATCH: Slave Address Match
• SMEN: SMBus Mode Enable
• SEN: Slave Enable
32099F–11/2010
This bit will always read as 0.
Writing a zero to this bit has no effect.
Writing a one to this bit resets the TWIS.
Writing this bit to zero disables clock stretching if RHR/THR buffer full/empty. May cause over/underrun.
Writing this bit to one enables clock stretching if RHR/THR buffer full/empty.
Writing this bit to zero causes TWIS not to acknowledge the General Call Address.
Writing this bit to one causes TWIS to acknowledge the General Call Address.
Writing this bit to zero causes TWIS not to acknowledge the Slave Address.
Writing this bit to one causes TWIS to acknowledge the Slave Address.
Writing this bit to zero disables SMBus mode.
Writing this bit to one enables SMBus mode.
Writing this bit to zero disables the slave interface.
Writing this bit to one enables the slave interface.
AT32UC3L016/32/64
516
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