AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 833

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AT32UC3L-EK

Manufacturer Part Number
AT32UC3L-EK
Description
KIT EVAL AVR32 UC3 MCU
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT32UC3L-EK

Contents
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
UC3L
Kit Contents
Board
Features
USB / Battery Powered, Board Controller / Bootloader
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Tool Type
Starter Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor Series
AT32
Processor To Be Evaluated
AT32UC3L064
Interface Type
USB, Capacitive Touch
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3L-EK
Manufacturer:
Atmel
Quantity:
135
32099F–11/2010
2. Disabling POR33 may generate spurious resest
3. CONFIG register reads 0x4F
4. PB writes via debugger in sleep modes are blocked during sleepwalking
5. VERSION register reads 0x400
6. WCAUSE register should not be used
7. Static mode cannot be entered if the WDT is using OSC32K
8. It is not possible to mask the request clock requests
9. Clock failure detector (CFD) does not work
10. Instability when exiting sleep walking
Depending on operating conditions, POR33 may generate a spurious reset in one of the fol-
lowing cases:
- When POR33 is disabled from the user interface.
- When SM33 supply monitor is enabled.
- When entering Shutdown mode while debugging the chip using JTAG or aWire interface.
In the listed cases, writing a one to the bit VREGCR.POR33MASK in the System Control
Interface (SCIF) to mask the POR33 reset will be ineffective.
Fix/Workaround
- Do not disable POR33 using the user interface.
- Do not use the SM33 supply monitor.
- Do not enter Shutdown mode if a debugger is connected to the chip.
The CONFIG register reads 0x4F instead of 0x43.
Fix/Workaround
None.
During sleepwalking, PB writes performed by a debugger will be discarded by all PB mod-
ules except the module that is requesting the clock.
Fix/Workaround
None.
The VERSION register reads 0x400 instead of 0x411.
Fix/Workaround
None.
The WCAUSE register should not be used.
Fix/Workaround
None.
If the WDT is using OSC32K as clock source and the user tries to enter Static mode, the
Deepstop mode will be entered instead.
Fix/Workaround
None.
It is not possible to mask the request clock requests using PPCR.
Fix/Workaround
None.
The clock failure detector does not work.
Fix/Workaround
None.
If all the following operating conditions are true, exiting sleep walking might lead to
instability:
AT32UC3L016/32/64
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