AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 775

• Manufacturer Part Number: AT32UC3L-EK
• Description: KIT EVAL AVR32 UC3 MCU
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT32UC3L-EK

• Contents: *
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: UC3L
• Kit Contents: Board
• Features: USB / Battery Powered, Board Controller / Bootloader
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Tool Type: Starter Kit
• Cpu Core: AVR 8
• Data Bus Width: 8 bit
• Processor Series: AT32
• Processor To Be Evaluated: AT32UC3L064
• Interface Type: USB, Capacitive Touch
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

31.6.7.10
32099F–11/2010
MEMORY_READ
The 4 MSB of the 36 bit SAB address are submitted together with the size field (2 bits). Then fol-
lows the 4 remaining address bytes and finally the data bytes. The size of the transfer is
specified using the values from the following table:
Table 31-42. Size Field Decoding
Below is an example write command:
The length field is set to 0x0009 because there are 9 bytes of additional data: 5 address and size
bytes and 4 bytes of data. The address and size field indicates that words should be written to
address 0x500000004. The data written to 0x500000004 is 0xCAFEBABE.
Table 31-43. MEMORY_WRITE Details
This command enables reading of memory/registers on the Service Access Bus (SAB). The
MEMORY_READ command allows words, halfwords, and bytes to be read from a continuous
sequence of addresses in one operation. The user must supply:
Size field
00
01
10
11
Command
Command value
Additional data
Possible responses
1. 0x55 (sync)
2. 0x80 (command)
3. 0x00 (length MSB)
4. 0x09 (length LSB)
5. 0x25 (size and address MSB, the two MSB of this byte are unused and set to zero)
6. 0x00
7. 0x00
8. 0x00
9. 0x04 (address LSB)
10. 0xCA
11. 0xFE
12. 0xBA
13. 0xBE
14. 0xXX (CRC MSB)
15. 0xXX (CRC LSB)
Description
Byte transfer
Halfword transfer
Word transfer
Reserved
Details
0x80
Size, Address and Data
0xC2: MEMORY_READWRITE_STATUS
0x41: NACK
(Section
AT32UC3L016/32/64
31.6.8.2)
(Section
31.6.8.5)
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