AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 769

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AT32UC3L-EK

Manufacturer Part Number
AT32UC3L-EK
Description
KIT EVAL AVR32 UC3 MCU
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT32UC3L-EK

Contents
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
UC3L
Kit Contents
Board
Features
USB / Battery Powered, Board Controller / Bootloader
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Tool Type
Starter Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor Series
AT32
Processor To Be Evaluated
AT32UC3L064
Interface Type
USB, Capacitive Touch
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3L-EK
Manufacturer:
Atmel
Quantity:
135
31.6.6.2
31.6.6.3
31.6.6.4
32099F–11/2010
The RESET_N pin
Initializing the AW
Disabling the AW
Avoiding drive contention when changing direction
The aWire debug protocol uses one dataline in both directions. To avoid both the master and the
slave to drive this line when changing direction the AW has a built in guard time before it starts to
drive the line. At reset this guard time is set to maximum (128 bit cycles), but can be lowered by
the master upon command.
The AW will release the line immediately after the stop character has been transmitted.
During the direction change there can be a period when the line is not driven. An external pullup
has to be added to RESET_N to keep the signal stable when neither master or slave is actively
driving the line.
Normal reset functionality on the RESET_N pin is disabled when using aWire. However, the
user can reset the system through the RESET aWire command. During aWire operation the
RESET_N pin should not be connected to an external reset circuitry, but disconnected via a
switch or a jumper to avoid drive contention and speed problems.
Figure 31-11. Reset Circuitry and aWire.
To enable AW, the user has to send a 0x55 pattern with a baudrate of 1 kHz on the RESET_N
pin. The AW is enabled after transmitting this pattern and the user can start transmitting com-
mands. This pattern is not the sync pattern for the first command.
After enabling the awire debug interface the halt bit is set automatically to prevent the system
from running code after the interface is enabled. To make the CPU run again set halt to zero
using the HALT command.
To disable AW, the user can keep the RESET_N pin low for 100 ms. This will disable the AW,
return RESET_N to its normal function, and reset the device.
An aWire master can also disable aWire by sending the DISABLE command. After acking the
command the AW will be disabled and RESET_N returns to its normal function.
Board Reset
Circuitry
Jumper
aWire master connector
RESET_N
AT32UC3L016/32/64
Power Manager
AW Debug
Interface
MCU
769

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