AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 811

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AT32UC3L-EK

Manufacturer Part Number
AT32UC3L-EK
Description
KIT EVAL AVR32 UC3 MCU
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT32UC3L-EK

Contents
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
UC3L
Kit Contents
Board
Features
USB / Battery Powered, Board Controller / Bootloader
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Tool Type
Starter Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor Series
AT32
Processor To Be Evaluated
AT32UC3L064
Interface Type
USB, Capacitive Touch
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3L-EK
Manufacturer:
Atmel
Quantity:
135
32.10.5
Table 32-42. TWI-Bus Timing Requirements
32099F–11/2010
t
t
t
t
t
t
r
f
HD-STA
SU-STA
SU-STO
HD-DAT
Symbol
TWIM/TWIS Timing
TWCK and TWD rise time
TWCK and TWD fall time
(Repeated) START hold time
(Repeated) START set-up time
STOP set-up time
Data hold time
Parameter
The maximum SPI slave input frequency is given by the following formula:
Where
CPOL and NCPHA.
ter for a description of this clock.
Maximum SPI Frequency, Slave Output Mode
The maximum SPI slave output frequency is given by the following formula:
Where
SPI master setup time. Please refer to the SPI master datasheet for
imum frequency of the SPI pins. Please refer to the I/O Pin Characteristics section for the
maximum frequency of the pins.
Figure 32-42
them. Some of these requirements (t
vention. Compliance with the other requirements (t
TWI
TWIM and TWIS user interface registers. Please refer to the TWIM and TWIS sections for more
information.
, t
HIGH
SPIn
SPIn
, and f
Standard
Fast
Standard
Fast
Standard
Fast
Standard
Fast
Standard
Fast
Standard
Fast
shows the TWI-bus timing requirements and the compliance of the device with
is the MISO delay, SPI6 or SPI9 depending on CPOL and NCPHA.
is the MOSI setup and hold time, SPI7 + SPI8 or SPI10 + SPI11 depending on
TWCK
Mode
(1)
) requires user intervention through appropriate programming of the relevant
f
CLKSPI
(1)
Requirement
f
SPCKMAX
is the maximum frequency of the CLK_SPI. Refer to the SPI chap-
0.3
0.6
4.7
0.6
4.0
0.6
f
4
SPCKMAX
(2)
20 + 0.1C
20 + 0.1C
Minimum
r
=
and t
MIN f
-
-
=
f
) are met by the device without requiring user inter-
b
b
(
MIN f
Device
PINMAX
4t
2t
t
t
clkpb
clkpb
clkpb
clkpb
(
HD-STA
CLKSPI
,
------------------------------------
SPIn
, t
AT32UC3L016/32/64
,
SU-STA
----------- -
SPIn
Requirement
+
1
1
t
SETUP
3.45
)
0.9
, t
SU-STO
()
()
)
Maximum
t
SETUP
1000
, t
300
300
300
-
-
-
HD-DAT
15t
.
f
prescaled
PINMAX
Device
, t
SU-DAT-TWI
t
SETUP
+ t
is the max-
clkpb
, t
is the
Unit
LOW-
μ s
μ s
μs
μs
811
ns
ns

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