AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 479

• Manufacturer Part Number: AT32UC3L-EK
• Description: KIT EVAL AVR32 UC3 MCU
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT32UC3L-EK

• Contents: *
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: UC3L
• Kit Contents: Board
• Features: USB / Battery Powered, Board Controller / Bootloader
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Tool Type: Starter Kit
• Cpu Core: AVR 8
• Data Bus Width: 8 bit
• Processor Series: AT32
• Processor To Be Evaluated: AT32UC3L064
• Interface Type: USB, Capacitive Touch
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 21-13. Combining a Read and Write Transfer
21.8.8
21.8.8.1
Figure 21-14. A Write Transfer with 10-bit Addressing
21.8.8.2
32099F–11/2010
SR.IDLE
RXRDY
TXRDY
TWD
RHR
THR
Ten Bit Addressing
S
Master Transmitter
Master Receiver
SADR
S
1
R
SLAVE ADDRESS
1
To generate this transfer:
Setting CMDR.TENBIT enables 10-bit addressing in hardware. Performing transfers with 10-
bit addressing is similar to transfers with 7-bit addresses, except that bits 10:7 of CMDR.ADR
must be set appropriately.
In
driven by the master, the white boxes are driven by the slave.
To perform a master transmitter transfer,
When using master receiver mode with 10-bit addressing, CMDR.REPSAME must also be
controlled. CMDR.REPSAME must be written to one when the address phase of the transfer
should consist of only 1 address byte (the 11110xx byte) and not 2 address bytes. The I²C
standard specifies that such addressing is required when addressing a slave for reads using
10-bit addressing.
To perform a master receiver transfer,
1
TWI_RHR
1st 7 bits
1. Program CMDR with START=1, STOP=0, DADR, NBYTES=2 and READ=1.
2. Program NCMDR with START=1, STOP=1, DADR, NBYTES=2 and READ=0.
3. Wait until SR.RXRDY==1, then read first data byte received from RHR.
4. Wait until SR.RXRDY==1, then read second data byte received from RHR.
5. Wait until SR.TXRDY==1, then write first data byte to transfer to THR.
6. Wait until SR.TXRDY==1, then write second data byte to transfer to THR.
1. Program CMDR with TENBIT=1, REPSAME=0, READ=0, START=1, STOP=1 and
A
Read
Figure 21-14 on page 479
1
the desired address and NBYTES value.
0
DATA0
X
X
RW A1
0
DATA0
A
DATA1
SLAVE ADDRESS
2nd byte
and
DATA3
A
Figure 21-15 on page
Sr
DADR
A2
1
DATA
W
AT32UC3L016/32/64
A
A
480, the grey boxes represent signals
DATA2
DATA2
DATA
A
AA
P
DATA3
DATA3
NA
P
479
2