AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 372

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AT32UC3L-EK

Manufacturer Part Number
AT32UC3L-EK
Description
KIT EVAL AVR32 UC3 MCU
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT32UC3L-EK

Contents
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
UC3L
Kit Contents
Board
Features
USB / Battery Powered, Board Controller / Bootloader
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Tool Type
Starter Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor Series
AT32
Processor To Be Evaluated
AT32UC3L064
Interface Type
USB, Capacitive Touch
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3L-EK
Manufacturer:
Atmel
Quantity:
135
32099F–11/2010
If STTTO is performed, the counter clock is stopped until a first character is received. The idle
state on RXD before the start of the frame does not provide a time-out. This prevents having to
obtain a periodic interrupt and enables a wait of the end of frame when the idle state on RXD is
detected.
If RETTO is performed, the counter starts counting down immediately from the value TO. This
enables generation of a periodic interrupt so that a user time-out can be handled, for example
when no key is pressed on a keyboard.
Figure 19-12
Figure 19-12. Receiver Time-out Block Diagram
Table 19-6
Table 19-6.
• Obtain an interrupt while no character is received. This is performed by writing CR with the
RETTO
handle an interrupt before a character is received and allows waiting for the next idle state on
RXD after a frame is received.
RETTO (Reload and Start Time-out) bit at 1. If RETTO is performed, the counter starts
counting down immediately from the value TO. This enables generation of a periodic interrupt
so that a user time-out can be handled, for example when no key is pressed on a keyboard.
Character
Received
Baud Rate
STTTO
gives the maximum time-out period for some standard baud rates.
bit/sec
14400
19200
28800
33400
shows the block diagram of the Receiver Time-out feature.
1 200
2 400
4 800
9 600
600
Maximum Time-out Period
1
D
Clear
Q
Baud Rate
Clock
Clock
Bit Time
1 667
833
417
208
104
69
52
35
30
µs
16-bit Time-out
Counter
TO
AT32UC3L016/32/64
Load
16-bit
Value
0
Time-out
109 225
54 613
27 306
13 653
6 827
4 551
3 413
2 276
1 962
=
ms
TIMEOUT
372

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