IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 112

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

7–4
Avalon-MM Master Block
DSP Builder Standard Blockset User Guide
f
Each of the input and output ports of the block correspond to the input and output
ports of the pin or bus that
Inputs to the DSP Builder core display as right pointing bus or pins; outputs from the
core display as left pointing pins or busses.
You can use the opposite end of any pins to provide pass-through test data from the
Simulink domain.
You may want to use an Avalon-MM Master block (for example, to design a DMA
controller) in a design that functions as an Avalon-MM Master in your SOPC Builder
system.
The Avalon-MM Master block is similar to the Avalon-MM Slave block and
supports the following signals:
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■
■
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■
■
■
■
■
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For more information about these signals, refer to the
Libraries
Figure 7–2 on page 7–5
where all the Avalon-MM signals are enabled.
clock
waitrequest
address
read
readdata
write
writedata
byteenable
endofpacket
readdatavalid
flush
burstcount
irq
irqnumber
section in volume 2 of the DSP Builder Handbook.
shows a block that describes an Avalon-MM master interface
Figure 7–1
Preliminary
shows between the ports.
DSP Builder Standard Blockset
Chapter 7: Using the Interfaces Library
© June 2010 Altera Corporation
Avalon-MM Interface Blocks