IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 287

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Avalon Memory-Mapped Blocks
© June 2010 Altera Corporation
f
f
1
Use the blocks in the Interfaces library to build custom logic blocks that support the
Avalon
interfaces.
The Interfaces library contains the following blocks:
■
■
■
■
■
■
■
The Avalon-MM blocks automate the process of specifying master and slave ports
that are compatible with the Avalon-MM bus.
After you build a model of your DSP Builder peripheral, you can add the following
blocks to control the peripheral’s inputs and outputs:
■
■
For more information about the Avalon-MM interface, refer to the
Specifications.
After you synthesize your model and compile it in the Quartus II software, use SOPC
Builder to add it to your Nios II system.
Your design automatically appears under the DSP Builder category in the SOPC
Builder component browser peripherals listing if the MDL file is in the same directory
as the SOPC file.
A file mydesign.mdl creates a component mydesign_interface in SOPC Builder.
For the peripheral to appear in SOPC Builder, the working directory for your SOPC
Builder project must be the same as your DSP Builder working directory.
For information about using SOPC Builder to create Nios II designs, refer to the
Hardware Development
Avalon-MM Master
Avalon-MM Slave
Avalon-MM Read FIFO
Avalon-MM Write FIFO
Avalon-ST Packet Format Converter
Avalon-ST Sink
Avalon-ST Source
Configurable master and slave blocks that contain the ports required to connect
peripherals that use the Avalon-MM bus.
Wrapped versions of the Avalon-MM slave that implement an Avalon-MM read
FIFO buffer and Avalon-MM write FIFO.
®
Memory-Mapped (Avalon-MM) and Avalon Streaming (Avalon-ST)
Tutorial.
Preliminary
5. Interfaces Library
DSP Builder Standard Blockset Libraries
Avalon Interface
Nios II