IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 312

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

6–4
Figure 6–3. Sign Extension
Binary Point Casting
Table 6–4. Binary Point Casting Block Parameters
Table 6–5. Binary Point Casting Block I/O Formats (Part 1 of 2)
DSP Builder Standard Blockset Libraries
Bus Type
[number of bits].[] >= 0
[].[number of bits] >= 0
Output Binary
Point Position
I
I/O
I1
Name
[Li].[Ri]
Simulink (2),
1
Signed Integer,
Signed Fractional,
Unsigned Integer
(Parameterizable)
(Parameterizable)
>= 0
(Parameterizable)
Figure 6–3
You can also perform additional internal bus manipulation with the Altera Bus
Conversion, Extract Bit, or Bus Builder blocks.
The Binary Point Casting block changes the binary point position for a signed
fractional bus type, or converts an integer to a fractional bus type.
The output bit width remains equal to the input bit width.
Table 6–4
Table 6–5
(3)
Value
I1: in STD_LOGIC_VECTOR({Li + Ri - 1} DOWNTO 0)
shows the Binary Point Casting block parameters.
shows the Binary Point Casting block I/O formats.
shows AltBus blocks for sign extension.
The number format of the bus.
Specifies the number of bits to the left of the binary point, including the sign bit.
Specifies the number of bits to the right of the binary point. This parameter
applies only to signed fractional buses.
Specifies the binary point location of the output.
Preliminary
(Note 1)
VHDL
Description
© June 2010 Altera Corporation
Chapter 6: IO & Bus Library
Binary Point Casting
Type
Explicit
(4)