IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 337

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

External RAM
Table 8–1. External RAM Block Inputs and Outputs (Part 1 of 2)
© June 2010 Altera Corporation
WriteData
WriteAddress
ReadAddress
Read
Write
ReadData
WriteWaitRequest Output
Signal
f
f
1
The Simulation library contains the following simulation-only blocks that do not
synthesize to HDL when
■
■
The External RAM block is a simulation model of an external RAM. The External
RAM block stores and retrieves data from a range of addresses and is compatible with
the Avalon-MM interface.
For information about the Avalon-MM interface, refer to
This block is not cycle-accurate and a warning issues if you use it in a gate level
(cycle-accurate) simulation.
If 64 or 128 bit data width is specified, the block attempts to use a Simulink
fixed-point license. If you do not have a Simulink fixed-point license., you can only
use 8, 16 or 32 bit data widths.
For information about fixed-point licenses, refer to the Simulink Help.
This is a simulation only block, and does not generate any HDL when
Compiler
Table 8–1
Input
Input
Input
Input
Input
Output
External RAM
Multiple Port External RAM
Direction
shows the External RAM block inputs and outputs.
is run.
Data lines for write transfers. Not required if there are no write transfers. If used,
also use Write.
Address lines for write transfers.
Address lines for read transfers.
Read request signal. Not required if there are no read transfers. If used, also use
ReadData.
Write request signal. Not required if there are no write transfers. If used, also use
WriteData.
Data lines for read transfers. Not required if there are no read transfers. If used, also
use Read.
Stalls the interface when the Avalon-MM interface cannot respond immediately to a
write request.
Signal Compiler
Preliminary
runs:
Description
8. Simulation Library
Avalon Interface
DSP Builder Standard Blockset Libraries
Signal
Specifications.