IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 153

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 10: Adding a Board Library
Creating a New Board Description
© June 2010 Altera Corporation
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The configuration element defines the board configuration block. For example:
<component name="LED1" pin="Pin_B3"/>
where attribute name defines the name of the component on the board and pin
defines the FPGA pin to which the component is connected. The name must match
one of the predefined components and you can use it only once per board.
Fixed-size bus type example:
<component name="DipSwitch" label="S1">
</component>
where attribute name defines the name of the component on the board and label
defines the name of the component as it appears in Simulink. For a component
with width n, there must be n pin subelements. The pin location must be a valid
FPGA pin name. The pin ordering is listed from LSB to MSB, with LSB on top of
the list.
Selectable single bit type example:
This element has the same format as the fixed-size bus type, but you can choose
each pin element from a specified list of available FPGA pin locations.
<configuration icon="dspboard2c35.bmp" width="166" height="144">
<!-- Input clock selection list -->
<component name="PROTO1">
</component>
<pin location="Pin_AC13"/> <!-- LSB -->
<pin location="Pin_A19"/>
<pin location="Pin_C21"/>
<pin location="Pin_C23"/>
<pin location="Pin_AE18"/>
<pin location="Pin_AE19"/> <!-- MSB-->
<devices jtag-code="0x020B40DD">
</devices>
<option name="ClockPinIn" label="Clock Pin In">
<pin location="Pin_C3"/>
<pin location="Pin_D2"/>
<pin location="Pin_L3"/>
<pin location="Pin_J7"/>
<pin location="Pin_J6"/>
<pin location="Pin_K6"/>
<device name="EP2C35F672C6" />
<pin location="Pin_N2"/>
<pin location="Pin_N25"/>
<pin location="Pin_AE14"/>
<pin location="Pin_AF14"/>
<pin location="None"/>
Preliminary
DSP Builder Standard Blockset User Guide
10–5