IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 388

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

11–14
Figure 11–12. Design Example for the Stratix EP1S80 DSP Board
Stratix II EP2S60 DSP Board
Table 11–8. Stratix EP2S60 DSP Board Blocks (Part 1 of 2)
DSP Builder Standard Blockset Libraries
1
Block
A2D_1 and A2D_2
D2A_1 and D2A_2
IO_DEV_CLRn
LED0–LED7
PROTO and
PROTO1
The Stratix II EP2S60 DSP board is a development platform for high-performance
digital signal processing (DSP) designs, and features the Stratix II EP2S60 device in a
1020-pin package.
The Stratix II EP2S60 DSP board supports alternative EP2S60F1020C4 and
EP2S60F1020C4ES devices, which you can select in the configuration block properties.
Table 11–8
lists the blocks available to support the Stratix EP2S60 DSP board.
Controls the 12-bit signed analog-to-digital converters (U1, U2). You can optionally
specify the clock signal.
Controls the 14-bit unsigned digital-to-analog converters (U14, U15)
Controls the board reset push-button switch (SW8). You can optionally specify the
clock signal.
Controls eight user-definable LEDs (D1–D8).
Santa Cruz connectors, which controls the prototyping area I/O. You can optionally
specify Input or Output node type, specify the input clock signal, and specify the
pin locations (J23– J25, J26–J28).
Preliminary
Description
© June 2010 Altera Corporation
Stratix II EP2S60 DSP Board
Chapter 11: Boards Library