IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 136

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

8–6
Subsystem Builder Design Example
Creating a Black Box System
DSP Builder Standard Blockset User Guide
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The Subsystem Builder block makes it easy for you to import the input and
output signals for a VHDL or Verilog HDL design into a Simulink subsystem.
If your HDL design contains any LPM or megafunctions that the HDL Import block
does not support, use the Subsystem Builder block. The Subsystem Builder
block also allows you to create your own Simulink simulation model from non-DSP
Builder blocks for faster simulation speed.
Unlike the HDL Import block, the Subsystem Builder block does not create a
Simulink simulation model for the imported HDL design.
For more information about the Subsystem Builder block, refer to the block
description in the AltLab Library chapter in the
section in volume 2 of the DSP Builder Handbook.
In addition to porting the HDL design to a Simulink subsystem, you must create the
Simulink simulation model for the block. The simulation models describes the
functionality of the particular HDL subsystem. The following options are available to
create Simulink simulation models:
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■
■
■
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You must add a Non-synthesizable Input block and a Non-synthesizable
Output block around any DSP Builder blocks in the subsystem.
The following section shows an example that uses an S-function to describe the
simulation models of the HDL code.
To create a black-box system, follow these steps:
1. In MATLAB, change the current directory to: <DSP Builder install path>
2. Click Open on the File menu. Select the filter8tap.mdl file and click OK.
3. Open the Simulink Library Browser and expand the AltLab library under the
4. Drag a Subsystem Builder block into your model.
Simulink generic library
Simulink blocksets (such as the DSP and Communications blocksets)
DSP Builder blockset
MATLAB functions
S-functions
\DesignExamples\Tutorials\BlackBox\SubSystemBuilder
Altera DSP Builder blockset.
Preliminary
DSP Builder Standard Blockset Libraries
Chapter 8: Using Black Boxes for HDL Subsystems
Subsystem Builder Design Example
© June 2010 Altera Corporation