IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 37

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 2: Getting Started
Simulating the Model in Simulink
Simulating the Model in Simulink
Figure 2–8. Configuration Parameters
© June 2010 Altera Corporation
5. Save your model.
To simulate your model in the Simulink software, follow these steps:
1. Click Configuration Parameters on the Simulation menu to display the
2. Set the parameters
Table 2–15. Configuration Parameters for the singen Model
3. Click OK.
Parameter
Start time
Stop time
Type
Solver
1
Configuration Parameters dialog box and select the Solver page
page
f
2–15).
A clock block is required to set a Simulink sample time that matches the
sample time specified on the Sine Wave and Random Bitstream blocks.
If no base clock exists in your design, a default clock with a 20ns real-world
period and a Simulink sample time of 1 is automatically created.
For detailed information about solver options, refer to the description of
the Solver Pane in the Simulink Help.
(Table
Preliminary
2–15).
Value
0.0
4e–6
Fixed-step
discrete (no continuous states)
DSP Builder Standard Blockset User Guide
(Figure 2–8 on
2–15