IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 20

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

1–2
Features
DSP Builder Standard Blockset User Guide
f
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Table 1–2. Supported Memory Block Types
For more information about each memory block type, refer to the Quartus II Help.
DSP Builder standard blockset supports the following features:
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For information about new features and errata in this release, refer to the
Release Notes and
Memory Block Type
Links The MathWorks MATLAB (Signal Processing ToolBox and Filter Design
Toolbox) and Simulink software with the Altera
Generates VHDL testbench and controls Quartus II compilation.
Provides a variety of fixed-point arithmetic and logical operators for use with the
Simulink software.
Enables rapid prototyping using Altera DSP development boards.
Supports the SignalTap
probes signals from the Altera device on the DSP board and imports the data into
the MATLAB workspace to ease visual analysis.
Allows HDL import of VHDL or Verilog HDL design entities and HDL defined in
a Quartus II project file.
Supports hardware-in-the loop (HIL) to enable FPGA hardware accelerated
cosimulation with Simulink.
Supports Avalon
configurable blocks, which you can use to build custom logic that works with the
Nios
Supports Avalon Streaming (Avalon-ST) interfaces including an Packet Format
Converter block and configurable Avalon-ST sink and Avalon-ST source blocks.
Allows you to instance Altera DSP MegaCore
model.
Supports tabular and graphical state machine editing.
M-RAM
M512
®
M4K
II processor and other SOPC Builder designs.
Errata.
®
Stratix II GX, Stratix II, Stratix GX, Stratix, Arria GX
Stratix II GX, Stratix II, Stratix GX, Stratix, Arria GX, Cyclone II, Cyclone
Stratix II GX, Stratix II, Stratix GX, Stratix, Arria GX
Memory-Mapped (Avalon-MM) interfaces including user
®
II logic analyzer—an embedded signal analyzer that
Preliminary
Device Family
®
functions in a DSP Builder design
®
Quartus
®
© June 2010 Altera Corporation
II software.
Chapter 1: About DSP Builder
DSP Builder
Features