IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 119

DSP BUILDER SOFTWARE

IPTR-DSPBUILDER

Manufacturer Part Number
IPTR-DSPBUILDER
Description
DSP BUILDER SOFTWARE
Manufacturer
Altera
Type
DSPr
Datasheets

Specifications of IPTR-DSPBUILDER

Function
DSP Builder
License
Renewal License
Software Application
IP CORE, DSP BUILDER
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Supported Families
Arria GX, Arria II GX, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
Not applicable / Not applicable
Chapter 7: Using the Interfaces Library
Avalon-MM Interface Blocks Design Example
Verifying the Design
© June 2010 Altera Corporation
16. Add oscilloscope probes to monitor the signals on the DSP development board.
17. Click Save on the File menu in your model window to save your model.
18. Run a simulation and observe the results on the oscilloscope probes. Coefficient
Before using your design in SOPC Builder, use the TestBench block to verify your
design. To verify your design, follow these steps:
1. Double-click the TestBench block to display the TestBench Generator dialog box
Figure 7–8. TestBench Dialog Box
2. Click Compare against HDL.
values 1 0 0 0 load into the filter.
(Figure
This process generates HDL, runs Simulink and ModelSim, and then compares the
simulation results. Progress messages issue in the dialog box and completes with a
message “Exact Match”.
7–8).
Preliminary
DSP Builder Standard Blockset User Guide
7–11

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