IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 97

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 5: Using HIL
Burst and Frame Modes
Figure 5–7. DSP Builder Design Using the FFT MegaCore Function
Figure 5–8. Using the FFT Design With an HIL Block
© June 2010 Altera Corporation
f
Figure 5–8 on page 5–9
from
The FFT MegaCore function respectively uses the Avalon-ST interface signals
sink_eop and source_valid in the HIL block as the input synchronization and
output synchronization signals.
Refer to the
input and output port signal timing.
Figure 5–6 on page
FFT MegaCore Function User Guide
shows the FFT design with a HIL block (and the parameters
5–7).
Preliminary
for additional information about the
DSP Builder Standard Blockset User Guide
5–9