QG5000X S L9TH Intel, QG5000X S L9TH Datasheet - Page 17
QG5000X S L9TH
Manufacturer Part Number
QG5000X S L9TH
Description
Manufacturer
Intel
Datasheet
1.QG5000X_S_L9TH.pdf
(458 pages)
Specifications of QG5000X S L9TH
Lead Free Status / RoHS Status
Compliant
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Introduction
Table 1-1.
Intel
®
5000X Chipset Memory Controller Hub (MCH) Datasheet
General Terminology (Sheet 5 of 7)
Primary PCI
Push Model
Queue
RAID
RASUM
Receiver, Rcvr
Request
Reserved
RMW
Row
Row Address
Terminology
The physical PCI bus that is driven directly by the Intel® 631xESB/632xESB I/O
Controller Hub component. Communication between PCI and the MCH occurs over
ESI. Note that even though the Primary PCI bus is referred to as PCI it is not PCI Bus
0 from a configuration standpoint.
Method of messaging or data transfer that predominately uses writes instead of reads.
A storage structure for information. Anything that enters a queue will exit eventually.
The most common policy to select an entry to read from the queue is FIFO (First In
First Out).
Redundant Array of Independent Disks. RAID improves performance by disk striping,
which interleaves bytes or groups of bytes across multiple drives, so more than one
disk is reading and writing simultaneously. Fault tolerance is achieved by mirroring or
parity. Mirroring is 100% duplication of the data on two drives (RAID-1), and parity is
used (RAID-3 and 5) to calculate the data in two drives and store the results on a
third: a bit from drive 1 is XOR'd with a bit from drive 2, and the result bit is stored on
drive 3 (see OR for an explanation of XOR). A failed drive can be hot swapped with a
new one, and the RAID controller automatically rebuilds the lost data. RAID can be
classified into the following categories:
RAID-0
RAID-1
RAID-2
RAID-3
RAID-4
RAID-5
RAID-6
RAID-10
Memory mirroring scheme is actually memory-RAID-1.
Reliability, Availability, Serviceability, Usability, and Manageability, which are all
important characteristics of servers.
1.
2.
component.
The contents or undefined states or information are not defined at this time.
Using any reserved area is not permitted.
Read-Modify-Write operation.
A group of DRAM chips that fill out the data bus width of the system and are accessed
in parallel by each DRAM command.
The row address is presented to the DRAMs during an activate command, and
indicates which page to open within the specified bank (the bank number is presented
also).
A packet, phase, or cycle used to initiate a transaction on a interface, or within a
• RAID-0 is disk striping only, which interleaves data across multiple disks for
• Uses disk mirroring, which provides 100% duplication of data. Offers highest
• Bits (rather than bytes or groups of bytes) are interleaved across multiple disks.
• Data are striped across three or more drives. Used to achieve the highest data
• Similar to RAID-3, but manages disks independently rather than in unison. Not
• Most widely used. Data are striped across three or more drives for performance,
• Highest reliability, but not widely used. Similar to RAID-5, but does two different
• Actually RAID-1,0. A combination of RAID-1 and RAID-0 (mirroring and striping).
better performance. It does not provide safeguards against failure.
reliability, but doubles storage cost.
The Connection Machine used this technique, but this is a rare method.
transfer, because all drives operate in parallel. Parity bits are stored on separate,
dedicated drives.
often used.
and parity bits are used for fault tolerance. The parity bits from two drives are
stored on a third drive.
parity computations or the same computation on overlapping subsets of the data.
Above definitions can be extended to DRAM memory system as well. To avoid
confusion, the RAID scheme for memory is referred as memory-RAID.
The Agent that receives a packet across an interface regardless of whether it is
the ultimate destination of the packet.
More narrowly, the circuitry required to convert incoming signals from the
physical medium to more perceptible forms.
Description
17
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