QG5000X S L9TH Intel, QG5000X S L9TH Datasheet - Page 268

• Manufacturer Part Number: QG5000X S L9TH
• Manufacturer: Intel

Specifications of QG5000X S L9TH

• Lead Free Status / RoHS Status: Compliant

3.11.2
3.11.3
268
DIO0IBSTAT: PCI Express Intel IBIST Completion Status
Register
DIO0IBERR: PCI Express Intel IBIST Error Register
Device:
Function: 0
Offset:
Version:
Device:
Function: 0
Offset:
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
RWC
RWC
RWC
RWC
RWC
RWC
RWC
Attr
Attr
RO
RO
RO
RO
RO
RO
RO
RV
RV
0
394h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
0
395h
Default
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IBSTAT7: Intel IBIST Status port 7
0: Intel IBIST either has not started the first time or it is still running.
1: Intel IBIST is done. This bit will be cleared by hardware when the start bit is
asserted.
IBSTAT6: Intel IBIST Status port 6
0: Intel IBIST either has not started the first time or it is still running.
1: Intel IBIST is done. This bit will be cleared by hardware when the start bit is
asserted.
IBSTAT5: Intel IBIST Status port 5
0: Intel IBIST either has not started the first time or it is still running.
1: Intel IBIST is done. This bit will be cleared by hardware when the start bit is
asserted.
IBSTAT4: Intel IBIST Status port 4
0: Intel IBIST either has not started the first time or it is still running.
1: Intel IBIST is done. This bit will be cleared by hardware when the start bit is
asserted.
IBSTAT3: Intel IBIST Status port 3
0: Intel IBIST either has not started the first time or it is still running.
1: Intel IBIST is done. This bit will be cleared by hardware when the start bit is
asserted.
IBSTAT2: Intel IBIST Status port 2
0: Intel IBIST either has not started the first time or it is still running.
1: Intel IBIST is done. This bit will be cleared by hardware when the start bit is
asserted.
Reserved.
IBSTAT0: Intel IBIST Status port 0
0: Intel IBIST either has not started the first time or it is still running.
1: Intel IBIST is done. This bit will be cleared by hardware when the start bit is
asserted.
P7ERRDET: Error Detected on port 7
P6ERRDET: Error Detected on port 6
P5ERRDET: Error detected on port 5
P4ERRDET: Error detected on port 4
P3ERRDET: Error Detected on port 3
P2ERRDET: Error Detected on port 2
Reserved
P0ERRDET: Error detected on port 0
Intel
®
5000X Chipset Memory Controller Hub (MCH) Datasheet
Description
Description
Register Description