QG5000X S L9TH Intel, QG5000X S L9TH Datasheet - Page 46

• Manufacturer Part Number: QG5000X S L9TH
• Manufacturer: Intel

Specifications of QG5000X S L9TH

• Lead Free Status / RoHS Status: Compliant

Figure 3-1.
46
Conceptual Intel® 5000X chipset MCH PCI Configuration Diagram
• Device 17: Device 17, Function 0 is routed to the Coherency Engine and Data
• Device 19: Device 19, Function 0 is routed to the Debug and Miscellaneous
• Device 21: Device 21, Function 0, FBD Branch 0 Memory Map, Error Flag/Mask,
• Device 22: Device 22, Function 0, FBD Branch 1 Memory Map, Error Flag/Mask,
Manager registers. These devices reside at DID 25F1h.
registers. These devices reside at DID 25F3h.
and Channel Control registers. These devices reside at DID 25F5h.
and Channel Control registers. These devices reside at DID 25F6h.
PCI Express
PCI Express
PCI Express
PCI Express
Port 4
Port 5
Port 6
Port 7
4 bit
4 bit
4 bit
4 bit
Intel® 631xESB/632xESB I/O Controller Hub
Intel® 5000X
Chipset
Bus 0, Dev 31, Func 0
Bus 0, Dev 31, Func 1
Bus 0, Dev 31, Func 3
Bus 0, Dev 31, Func 5,6
Bridge Bus 0, Dev 4
Bridge Bus 0, Dev 5
Bridge Bus 0, Dev 6
Bridge Bus 0, Dev 7
PCI Express Port 4
PCI Express Port 5
PCI Express Port 6
PCI Express Port 7
SMBus Controller
AC97 Controller
IDE Controller
Processor 0
LPC Device
PCI Config Window in I/O Space
(PCI Express Bridge Bus 0,
(PCI Express Bridge Bus 0,
Intel
Dev 0)
Dev X)
DMI
DMI
®
DMI Interface (logical PCI Bus 0)
5000X Chipset Memory Controller Hub (MCH) Datasheet
Bus 0, Dev 30, Func 0
Bus n, Dev 8, Func 0
Bridge Bus 0, Dev Y
Bridge Bus 0, Dev Z
Bridge Bus 0, Dev 2
Bridge Bus 0, Dev 3
PCI Express Port 2
PCI Express Port 3
PCI Express Port 0
PCI Express Port 1
USB Controllers
LAN Controller
Processor 1
HI-PCI Bridge
Bus 0, Dev 29,
Func 0,1,2,7
PCI Express
PCI Express
PCI Express
PCI Express
Programmable
Primary PCI
Port 0
Port 0
Port 2
Port 3
4 bit
4 bit
4 bit
4 bit
Bus #
Register Description