QG5000X S L9TH Intel, QG5000X S L9TH Datasheet - Page 203

no-image

QG5000X S L9TH

Manufacturer Part Number
QG5000X S L9TH
Description
Manufacturer
Intel
Datasheet

Specifications of QG5000X S L9TH

Lead Free Status / RoHS Status
Compliant
Register Description
Table 3-41. FB-DIMM Host Data Cycle Valid Mux Select
Intel
®
5000X Chipset Memory Controller Hub (MCH) Datasheet
1. For 4:5 gear ratio, software should use either conservative or aggressive mode for all the
2. Ignored by Mgr registers in the 5:4 mode.
Notes:
FSB:Memory Frequency
respective memory gearing registers (no mix and match).
333:333
267:267
400:400
333:267
267:333
267:333
4:5 (conservative)
4:5 (aggressive)
Gear Ratio
1:1
5:4
1
Value
00h
00h
01h
04h
2
203

Related parts for QG5000X S L9TH