QG5000X S L9TH Intel, QG5000X S L9TH Datasheet - Page 441

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QG5000X S L9TH

Manufacturer Part Number

QG5000X S L9TH

Description

Manufacturer

Intel

Datasheet

1.QG5000X_S_L9TH.pdf (458 pages)

Specifications of QG5000X S L9TH

Lead Free Status / RoHS Status

Compliant

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Ballout and Package Information

Table 8-2.

Intel

Ball No.

AG12

AG10

AG15

AC12

AC10

AF15

AJ10

AJ13

AJ15

AJ16

AG8

AG3

AM1

AM6

AM9

AD9

AH8

AF7

AE7

AP2

AK3

AN2

AN3

AP1

AP5

AV4

AR6

AU7

AR7

AU5

AN6

AK9

AP4

AJ4

AL2

AT6

AL7

AL8

AT2

®

5000X Chipset Memory Controller Hub (MCH) Datasheet

FSB1ADSTB[0]#

FSB1ADSTB[1]#

FSB1BREQ[0]#

FSB1BREQ[1]#

FSB1BPM[4]#

FSB1BPM[5]#

Signal Name

FSB1AP[0]#

FSB1AP[1]#

FSB1BINIT#

FSB1BPRI#

FSB1D[10]#

FSB1D[11]#

FSB1D[12]#

FSB1D[13]#

FSB1D[14]#

FSB1D[15]#

FSB1D[16]#

FSB1D[17]#

FSB1D[18]#

FSB1D[19]#

FSB1D[20]#

FSB1D[21]#

FSB1D[57]#

FSB1D[58]#

FSB1D[59]#

FSB1D[60]#

FSB1D[61]#

FSB1ADS#

FSB1BNR#

FSB1A[4]#

FSB1A[5]#

FSB1A[6]#

FSB1A[7]#

FSB1A[8]#

FSB1A[9]#

FSB1D[0]#

FSB1D[1]#

FSB1D[2]#

FSB1D[6]#

Intel 5000X Chipset MCH Signals (by Signal Name) (Sheet 6 of 19)

Common Clk

Common Clk

Common Clk

Common Clk

Common Clk

Common Clk

Common Clk

Common Clk

Common Clk

Common Clk

Buffer Type

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Direction

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

O

Ball No.

AM13

AM16

AM15

AK12

AU10

AP13

AR13

AR12

AP14

AH14

AN14

AN15

AH16

AP16

AE10

AN11

AL13

AV10

AV12

AT12

AP11

AL14

AL16

AE11

AL11

AT11

AR1

AU8

AR9

AR3

AR4

AK5

AK2

AV7

AT9

AT8

AV9

AL1

AL5

FSB1REQ[4]#

FSB1RESET#

Signal Name

FSB1RS[0]#

FSB1RS[1]#

FSB1RS[2]#

FSB1D[27]#

FSB1D[28]#

FSB1D[29]#

FSB1D[30]#

FSB1D[31]#

FSB1D[32]#

FSB1D[33]#

FSB1D[34]#

FSB1D[35]#

FSB1D[36]#

FSB1D[37]#

FSB1D[38]#

FSB1D[39]#

FSB1D[40]#

FSB1D[41]#

FSB1D[42]#

FSB1D[43]#

FSB1D[44]#

FSB1D[45]#

FSB1D[46]#

FSB1D[47]#

FSB1D[48]#

FSB1D[49]#

FSB1D[50]#

FSB1D[51]#

FSB1D[52]#

FSB1D[53]#

FSB1D[54]#

FSB1D[55]#

FSB1D[56]#

FSB1RSP#

FSB1D[3]#

FSB1D[4]#

FSB1D[5]#

Common Clk

Common Clk

Common Clk

Common Clk

Common Clk

Buffer Type

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Source Sync

Direction

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I

I

I

I

I

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