D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 28

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

15.4 Operation in Asynchronous Mode .................................................................................... 691
15.5 Multiprocessor Communication Function......................................................................... 702
15.6 Operation in Clocked Synchronous Mode ........................................................................ 709
15.7 Operation in Smart Card Interface Mode.......................................................................... 718
15.8 IrDA Operation ................................................................................................................. 729
15.9 Interrupt Sources............................................................................................................... 733
15.10 Usage Notes ...................................................................................................................... 735
Rev. 3.00 Mar 17, 2006 page xxvi of l
15.4.1 Data Transfer Format........................................................................................... 691
15.4.2 Receive Data Sampling Timing and Reception Margin in Asynchronous Mode 693
15.4.3 Clock.................................................................................................................... 694
15.4.4 SCI Initialization (Asynchronous Mode) ............................................................. 695
15.4.5 Data Transmission (Asynchronous Mode)........................................................... 696
15.4.6 Serial Data Reception (Asynchronous Mode)...................................................... 698
15.5.1 Multiprocessor Serial Data Transmission ............................................................ 703
15.5.2 Multiprocessor Serial Data Reception ................................................................. 705
15.6.1 Clock.................................................................................................................... 709
15.6.2 SCI Initialization (Clocked Synchronous Mode) ................................................. 710
15.6.3 Serial Data Transmission (Clocked Synchronous Mode) .................................... 711
15.6.4 Serial Data Reception (Clocked Synchronous Mode).......................................... 714
15.6.5 Simultaneous Serial Data Transmission and Reception
15.7.1 Pin Connection Example...................................................................................... 718
15.7.2 Data Format (Except for Block Transfer Mode).................................................. 719
15.7.3 Block Transfer Mode ........................................................................................... 720
15.7.4 Receive Data Sampling Timing and Reception Margin....................................... 720
15.7.5 Initialization ......................................................................................................... 722
15.7.6 Data Transmission (Except for Block Transfer Mode) ........................................ 723
15.7.7 Serial Data Reception (Except for Block Transfer Mode) ................................... 726
15.7.8 Clock Output Control........................................................................................... 727
15.9.1 Interrupts in Normal Serial Communication Interface Mode .............................. 733
15.9.2 Interrupts in Smart Card Interface Mode ............................................................. 734
15.10.1 Module Stop Mode Setting .................................................................................. 735
15.10.2 Break Detection and Processing .......................................................................... 735
15.10.3 Mark State and Break Sending............................................................................. 736
15.10.4 Receive Error Flags and Transmit Operations
15.10.5 Relation between Writes to TDR and the TDRE Flag ......................................... 736
15.10.6 Restrictions on Use of DMAC or DTC................................................................ 736
15.10.7 Operation in Case of Mode Transition................................................................. 737
(Clocked Synchronous Mode) ............................................................................. 716
(Clocked Synchronous Mode Only) .................................................................... 736